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Microchip Technology /ATSAMV71J19B /ICM /IDR

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Interpret as IDR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RHC0RDM0RBE0RWC0REC0RSU0 (URAD)URAD

Description

Interrupt Disable Register

Fields

RHC

Region Hash Completed Interrupt Disable
RDM

Region Digest Mismatch Interrupt Disable
RBE

Region Bus Error Interrupt Disable
RWC

Region Wrap Condition Detected Interrupt Disable
REC

Region End bit Condition detected Interrupt Disable
RSU

Region Status Updated Interrupt Disable
URAD

Undefined Register Access Detection Interrupt Disable

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data